AMD/Xilinx Vivado Integration

Sigasi Visual HDL (SVH) is often used in combination with the AMD/Xilinx Vivado Design Suite and offers many features to improve this workflow:

Configure Vivado

Configuring the Vivado installation path in SVH is explained here.

Using Vivado’s XSIM as external compiler

XSIM errors are displayed with markers in the editor and problems view

Configuring External compiler

Launching a simulation with XSIM

Start a simulation by setting a toplevel and clicking the run button

Launch simulator

Limitations

The Vivado integration in SVH does not support multi-project setups (i.e. project references).