Setting Up a UVM Project

Sigasi Visual HDL (SVH) provides several features that help write UVM testbenches. However, you first have to set up a project with a UVM library to use these features.

This page describes how to set up a UVM project in SVH. The instructions described here are general; refer to the Project Setup section for details on project setup.

  1. Open the folder of your UVM project and add Sigasi support to the project. The project will have a lot of errors at this point, indicating missing declarations and undefined macros as shown in the image below.
    Erroneous UVM project due to missing UVM library
  2. Make sure that UVM is added to SVH Tools and Libraries as explained in Adding Third-Party Libraries to a Project. If you don’t have UVM source files on your system yet, you can download them here .
  3. Use the UVM library inside your new project by opening the Preferences View, selecting UVM, and clicking the APPLY button as shown below.
    Use the extracted UVM library inside the new project
    At this point, most of the errors should be gone. The image below shows the linked UVM folder inside the Common Libraries in the Sigasi Projects view. You should now see UVM in your Common Libraries.
    UVM is added to the Common Libraries folder

After completing the steps above, all of the problems related to UVM configuration should be gone as shown below.

UVM errors are gone
You can now use all the UVM features, such as the UVM Diagram, UVM Topology View, and Preprocessor view. The latter resolves any includes automatically and allows you to view the entire UVM code after preprocessing.