The util
package that comes with Modelsim in the mti_util.vhd
file includes an enumerated type forcetype
that is defined as:
type forcetype is (default, deposit, drive, freeze);
In VHDL 2008, default is a new keyword.
This causes problems in VHDL 2008 projects that use the util
package.
Still, Sigasi Visual HDL allows to use the modelsim_lib.util
package in VHDL 2008 projects.
Since the code in modelsim_lib
is VHDL 93 code, modelsim_lib
should be compiled in VHDL 93 mode.
You can do so by right-clicking the modelsim_lib
folder in the Common Libraries of your project.
Then select Properties > VHDL Version and set the VHDL Version of the modelsim_lib
folder to VHDL 1993.
For VHDL 2008 compatibility, package util
provides the alias mti_default
that can be used in VHDL 2008 code instead of default
.
type forcetype is (default, deposit, drive, freeze);
alias mti_default is default [return forcetype];
In VHDL 2008 the util
package no longer is needed since the language now supports forcing and releasing of signal values.
More information can be found here .
See also
- VHDL IEEE 1076-2008 Grammar (blog post)
- Quick access to your design environment (screencast)
- Suppress warnings from within your code (screencast)
- Hover (aka Tooltips) for VHDL and SystemVerilog (screencast)
- Naming Conventions for VHDL and SystemVerilog (screencast)